.BJT is current control device. While FET and MOSFET's are voltage control device. BJT is bipolar junction device while FET and MOSFET's are unijunction transistor devices. BJT has lower input impedance while FET and MOSFET's are high input imp.
FET, Field Effect Transistor, Tutorial Includes:
FET basicsFET specsJFETMOSFETDual gate MOSFETPower MOSFETMESFET / GaAs FETHEMT & PHEMTFinFET technology
The junction field effect transistor or JFET is widely used in electronics circuits. The junction field effect transistor is a reliable and useful electronic component that can be used very easily in a variety of electronic circuits ranging from JFET amplifiers to JFET switch circuits.
- The Junction Field Effect transistor (JFET) is one of the types of FET transistors. JFET is a simplest form of FET transistors and it has three terminals. The JFET transistors are used as electronically controlled switches, Voltage controlled resistors and as amplifiers. BJT transistors are constructed with the PN-junctions but the JFET.
- FET s are checked by measuring different resistances by a multimeter. When resistance is checked between source and drain, it should be of the order of 10 kohms. How to test a JFET? JFET testing methods. When a JFET is checked as a diode (gate-to-channel junction) multimeter should indicate low resistance between gate and source with one polarity and very high resistance between gate.
- JFET or Field effect transistors are electrical devices that are either used as amplifiers or switches and have become an integral part of memory chips. JFET and MOSFET are two kinds of FET that work on the principle of junction transistors but are quite different from each other.
The junction field effect transistor is freely available, and JFETs can be bought for very little money. This makes them ideal for use in many circuits where a good balance between cost and performance is of interest.
JFETs have been available for many years, and although they don't offer the exceedingly high levels of DC input resistance of the MOSFET, they are nevertheless very reliable, robust and easy to use. This makes these electronic components an ideal choice for many electronic circuit designs. Also the components are available in both leaded and surface mount device formats.
JFET basics
Basically a field effect transistor or FET consists of a section of silicon whose conductance is controlled by an electric field. The section of silicon through which the current flows is called the channel, and it consists of one type of silicon, either N-type or P-type.
The connections at either end of the device are known as the source and drain. The electric field to control the current is applied to a third electrode known as a gate.
As it is only the electric field that controls the current flowing in the channel, the device is said to be voltage operated and it has a high input impedance, usually many megohms. This can be a distinct advantage over the bipolar transistor that is current operated and has a much lower input impedance.
JFET operation
The Junction FET is a voltage controlled device. In other words, voltages appearing on the gate, control the operation of the device.
Both N-channel and P-channel devices operate in similar ways, although the charge carriers are inverted, i.e. electrons in one and holes in the other. The case for the N-channel device will be described as this is the more commonly type used.
The thickness of this layer varies in accordance with the magnitude of the reverse bias on the junction. In other words when there is a small reverse bias the depletion layer only extends a small way into the channel and there is a large area to conduct current.
When a large negative bias is placed on the gate, the depletion layer increases, extending further into the channel, reducing the area over which current can be conducted.
With increasing bias the depletion layer will eventually increase to the degree that it extends right across the channel, and the channel is said to be cut off.
When a current flows in the channel the situation becomes slightly different. With no gate voltage electrons in the channel (assuming an n-type channel) will be attracted by the positive potential on the drain, and will flow towards it enabling a current to flow within the device, and hence within the external circuit.
The magnitude of the current is dependent upon a number of factors and included the cross sectional area of the channel, its length and conductivity (i.e. the number of free electrons in the material) and the voltage applied.
From this it can be seen that the channel acts as a resistor, and there will be a voltage drop along its length. As a result of this it means that the p-n junction becomes progressively more reverse biased as the drain is approached. Consequently the depletion layer takes becomes thicker nearer the drain as shown.
As the reverse bias on the gate is increased a point is reached where the channel is almost closed off by the depletion layer. However the channel never completely closes. The reason for this is that the electrostatic forces between the electrons cause them to spread out, giving a counter effect to the increase in thickness of the depletion layer.
After a certain point the field around the electrons flowing in the channel successfully opposes any further increase in the depletion layer. The voltage at which the depletion layer reaches its maximum is called the pinch off voltage.
JFET circuit applications
JFETs are very useful electronic components and as a result they are used in many electronic circuit designs. They offer a number of distinct advantages that can be put to use in many circuits.
- Simple biasing
- High input impedance
- Low noise
In view of their characteristics, JFETs are seen in many circuits ranging from amplifiers to oscillators, and logic switches to filters and many more applications.
JFET structure & fabrication
JFETs can be either N-channel of P-channel devices. They can be made in very similar manners, the main exception being that the N and P areas in the structure below are interchanged.
Often devices are made within a larger substrate and the FET itself fabricated as shown in the diagram below.
There are a number of ways in which FETs can be fabricated. For silicon devices a heavily doped substrate normally acts as a second gate.
The active n-type region may then be grown using epitaxy, or it may be formed by diffusing the impurities into the substrate or by ion implantation.
Where gallium arsenide is used the substrate is formed from a semi-insulating intrinsic layer. This reduces the levels of any stray capacitances and enables good high frequency performance to be obtained.
Whatever the material used for the FET, the distance between the drain and source is important and should be kept to a minimum. This reduces the transit times where high frequency performance is required, and gives a low on resistance that is vital when the device is to be used for power or switching applications.
In view of their popularity, JFETs are available in a variety of packages. They are widely available as leaded electronic components on the popular TO92 plastic package as well as a number of others. Then as surface mount devices they are available in packages including SOT-23 and SOT-223. It is probably as surface mount devices that JFETs are most widely used. Most large scale production is undertaken using surface mount technology and the accompanying surface mount devices.
Although the JFET is less popular than the MOSFET and fewer JFETs, it is still a very useful component. Offering high input impedance, simple biasing, low noise, and a low cost, it provides a high level of performance which can be used in many situations.
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The JFET is abbreviated as Junction Field Effect Transistor. JFET is just like a normal FET. The types of JFET are n-channel FET and P-channel FET. A p-type material is added to the n-type substrate in n-channel FET, whereas an n-type material is added to the ptype substrate in p-channel FET. Hence it is enough to discuss one type of FET to understand both.
N-Channel FET
The N-channel FET is the mostly used Field Effect Transistor. For the fabrication of Nchannel FET, a narrow bar of N-type semiconductor is taken on which P-type material is formed by diffusion on the opposite sides. These two sides are joined to draw a single connection for gate terminal. This can be understood from the following figure.
These two gate depositions (p-type materials) form two PN diodes. The area between gates is called as a channel. The majority carriers pass through this channel. Hence the cross sectional form of the FET is understood as the following figure.
Ohmic contacts are made at the two ends of the n-type semiconductor bar, which form the source and the drain. The source and the drain terminals may be interchanged.
Operation of N-channel FET
Before going into the operation of the FET one should understand how the depletion layers are formed. For this, let us suppose that the voltage at gate terminal say VGG is reverse biased while the voltage at drain terminal say VDD is not applied. Let this be the case 1.
In case 1, When VGG is reverse biased and VDD is not applied, the depletion regions between P and N layers tend to expand. This happens as the negative voltage applied, attracts the holes from the p-type layer towards the gate terminal.
In case 2, When VDD is applied (positive terminal to drain and negative terminal to source) and VGG is not applied, the electrons flow from source to drain which constitute the drain current ID.
Let us now consider the following figure, to understand what happens when both the supplies are given.
The supply at gate terminal makes the depletion layer grow and the voltage at drain terminal allows the drain current from source to drain terminal. Suppose the point at source terminal is B and the point at drain terminal is A, then the resistance of the channel will be such that the voltage drop at the terminal A is greater than the voltage drop at the terminal B. Which means,
VA>VB
Hence the voltage drop is being progressive through the length of the channel. So, the reverse biasing effect is stronger at drain terminal than at the source terminal. This is why the depletion layer tends to penetrate more into the channel at point A than at point B, when both VGG and VDD are applied. The following figure explains this.
Now that we have understood the behavior of FET, let us go through the real operation of FET.
Depletion Mode of Operation
As the width of depletion layer plays an important role in the operation of FET, the name depletion mode of operation implies. We have another mode called enhancement mode of operation, which will be discussed in the operation of MOSFETs. But JFETs have only depletion mode of operation.
Mosfet Vs Fet
Let us consider that there is no potential applied between gate and source terminals and a potential VDD is applied between drain and source. Now, a current ID flows from drain to source terminal, at its maximum as the channel width is more. Let the voltage applied between gate and source terminal VGG is reverse biased. This increases the depletion width, as discussed above. As the layers grow, the cross-section of the channel decreases and hence the drain current ID also decreases.
When this drain current is further increased, a stage occurs where both the depletion layers touch each other, and prevent the current ID flow. This is clearly shown in the following figure.
The voltage at which both these depletion layers literally “touch” is called as “Pinch off voltage”. It is indicated as VP. The drain current is literally nil at this point. Hence the drain current is a function of reverse bias voltage at gate.
What Is A Jfet
Since gate voltage controls the drain current, FET is called as the voltage controlled device. This is more clearly understood from the drain characteristics curve.
Drain Characteristics of JFET
Let us try to summarize the function of FET through which we can obtain the characteristic curve for drain of FET. The circuit of FET to obtain these characteristics is given below.
Fet Jfet Mosfet
When the voltage between gate and source VGS is zero, or they are shorted, the current ID from source to drain is also nil as there is no VDS applied. As the voltage between drain and source VDS is increased, the current flow ID from source to drain increases. This increase in current is linear up to a certain point A, known as Knee Voltage.
Mosfet Jfet
The gate terminals will be under reverse biased condition and as ID increases, the depletion regions tend to constrict. This constriction is unequal in length making these regions come closer at drain and farther at drain, which leads to pinch off voltage. The pinch off voltage is defined as the minimum drain to source voltage where the drain current approaches a constant value (saturation value). The point at which this pinch off voltage occurs is called as Pinch off point, denoted as B.
As VDS is further increased, the channel resistance also increases in such a way that ID practically remains constant. The region BC is known as saturation region or amplifier region. All these along with the points A, B and C are plotted in the graph below.
What Is A Mosfet Transistor
The drain characteristics are plotted for drain current ID against drain source voltage VDS for different values of gate source voltage VGS. The overall drain characteristics for such various input voltages is as given under.
As the negative gate voltage controls the drain current, FET is called as a Voltage controlled device. The drain characteristics indicate the performance of a FET. The drain characteristics plotted above are used to obtain the values of Drain resistance, Transconductance and Amplification Factor.